Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip

Umesh Gajanan Nawathe, Mahmudul Hassan, King C. Yen, Ashok Kumar, Aparna Ramachandran, David Greenhill. Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip. J. Solid-State Circuits, 43(1):6-20, 2008. [doi]

@article{NawatheHYKRG08,
  title = {Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip},
  author = {Umesh Gajanan Nawathe and Mahmudul Hassan and King C. Yen and Ashok Kumar and Aparna Ramachandran and David Greenhill},
  year = {2008},
  doi = {10.1109/JSSC.2007.910967},
  url = {https://doi.org/10.1109/JSSC.2007.910967},
  researchr = {https://researchr.org/publication/NawatheHYKRG08},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {43},
  number = {1},
  pages = {6-20},
}