Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Swarnalatha Radhakrishnan, Sri Parameswaran. Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs. IEEE Trans. on CAD of Integrated Circuits and Systems, 34(12):1991-2003, 2015. [doi]
@article{NawinneJRRP15,
title = {Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs},
author = {Isuru Nawinne and Haris Javaid and Roshan G. Ragel and Swarnalatha Radhakrishnan and Sri Parameswaran},
year = {2015},
doi = {10.1109/TCAD.2015.2445736},
url = {http://dx.doi.org/10.1109/TCAD.2015.2445736},
researchr = {https://researchr.org/publication/NawinneJRRP15},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {34},
number = {12},
pages = {1991-2003},
}