Parallel sparse matrix solver for direct circuit simulations on FPGAs

Tarek Nechma, Mark Zwolinski, Jeff S. Reeve. Parallel sparse matrix solver for direct circuit simulations on FPGAs. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 2358-2361, IEEE, 2010. [doi]

@inproceedings{NechmaZR10,
  title = {Parallel sparse matrix solver for direct circuit simulations on FPGAs},
  author = {Tarek Nechma and Mark Zwolinski and Jeff S. Reeve},
  year = {2010},
  doi = {10.1109/ISCAS.2010.5537195},
  url = {http://dx.doi.org/10.1109/ISCAS.2010.5537195},
  researchr = {https://researchr.org/publication/NechmaZR10},
  cites = {0},
  citedby = {0},
  pages = {2358-2361},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France},
  publisher = {IEEE},
}