Three Hardware Implementations for the Binary Modular Exponentiation: Sequential, Parallel and Systolic

Nadia Nedjah, Luiza de Macedo Mourelle. Three Hardware Implementations for the Binary Modular Exponentiation: Sequential, Parallel and Systolic. In 15th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2003), 10-12 November 2003, Sao Paulo, Brazil. pages 246-253, IEEE Computer Society, 2003. [doi]

Abstract

Abstract is missing.