Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations

Mohamed Nekili, Guy Bois, Yvon Savaria. Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations. IEEE Trans. VLSI Syst., 5(2):161-174, 1997. [doi]

@article{NekiliBS97,
  title = {Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations},
  author = {Mohamed Nekili and Guy Bois and Yvon Savaria},
  year = {1997},
  doi = {10.1109/92.585214},
  url = {http://doi.ieeecomputersociety.org/10.1109/92.585214},
  researchr = {https://researchr.org/publication/NekiliBS97},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {5},
  number = {2},
  pages = {161-174},
}