Hong Diep Nguyen, Bogdan Pasca, Thomas B. Preußer. FPGA-Specific Arithmetic Optimizations of Short-Latency Adders. In International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece. pages 232-237, IEEE, 2011. [doi]
@inproceedings{NguyenPP11,
title = {FPGA-Specific Arithmetic Optimizations of Short-Latency Adders},
author = {Hong Diep Nguyen and Bogdan Pasca and Thomas B. Preußer},
year = {2011},
doi = {10.1109/FPL.2011.49},
url = {http://doi.ieeecomputersociety.org/10.1109/FPL.2011.49},
researchr = {https://researchr.org/publication/NguyenPP11},
cites = {0},
citedby = {0},
pages = {232-237},
booktitle = {International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece},
publisher = {IEEE},
isbn = {978-1-4577-1484-9},
}