A fully integrated 43.2-Gb/s clock and data recovery and 1: 4 demux IC in InP HBT technology

S. Nielsen, J. C. Yen, N. K. Srivastava, J. E. Rogers, M. G. Case, R. Thiagarajah. A fully integrated 43.2-Gb/s clock and data recovery and 1: 4 demux IC in InP HBT technology. J. Solid-State Circuits, 38(12):2341-2346, 2003. [doi]

@article{NielsenYSRCT03,
  title = {A fully integrated 43.2-Gb/s clock and data recovery and 1: 4 demux IC in InP HBT technology},
  author = {S. Nielsen and J. C. Yen and N. K. Srivastava and J. E. Rogers and M. G. Case and R. Thiagarajah},
  year = {2003},
  doi = {10.1109/JSSC.2003.818573},
  url = {https://doi.org/10.1109/JSSC.2003.818573},
  researchr = {https://researchr.org/publication/NielsenYSRCT03},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {38},
  number = {12},
  pages = {2341-2346},
}