SNR analysis approach for hardware/software partitioning using dynamically adaptable fixed point representation - researchr publication related

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Varadaraj Kamath Nileshwar, Roman Lysecky. SNR analysis approach for hardware/software partitioning using dynamically adaptable fixed point representation. In Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang 0002, editors, Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. pages 27-32, ACM, 2012. [doi]

The following publications are possibly variants of this publication:

Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuitsLance Saldanha, Roman L. Lysecky. codes 2008: 49-54 [doi]

Dynamic hardware/software partitioning: a first approachGreg Stitt, Roman L. Lysecky, Frank Vahid. dac 2003: 250-255 [doi]

A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software PartitioningRoman L. Lysecky, Frank Vahid. date 2005: 18-23 [doi]

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