Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode

Y. Nishimura, M. Hamada, H. Hidaka, H. Ozaki, K. Fujishima, Y. Hayasaka. Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode. In Proceedings International Test Conference 1986, Washington, D.C., USA, September 1986. pages 826-829, IEEE Computer Society, 1986.

@inproceedings{NishimuraHHOFH86,
  title = {Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode},
  author = {Y. Nishimura and M. Hamada and H. Hidaka and H. Ozaki and K. Fujishima and Y. Hayasaka},
  year = {1986},
  tags = {redundancy, testing},
  researchr = {https://researchr.org/publication/NishimuraHHOFH86},
  cites = {0},
  citedby = {0},
  pages = {826-829},
  booktitle = {Proceedings International Test Conference 1986, Washington, D.C., USA, September 1986},
  publisher = {IEEE Computer Society},
}