Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP

Takao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Yukio Endo, Toshiyuki Kanou, Koichi Kikuchi. Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP. VLSI Signal Processing, 1(1):25-34, 1989. [doi]

@article{NishitaniTHEKK89,
  title = {Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP},
  author = {Takao Nishitani and Ichiro Tamitani and Hidenobu Harasaki and Yukio Endo and Toshiyuki Kanou and Koichi Kikuchi},
  year = {1989},
  doi = {10.1007/BF00932063},
  url = {http://dx.doi.org/10.1007/BF00932063},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/NishitaniTHEKK89},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {1},
  number = {1},
  pages = {25-34},
}