Takao Nishitani - researchr alias

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Viewing Publication 1 - 53 from 53

2018

Retinex Foreground Segmentation for Low Light EnvironmentsYuuki Tanaka, Yoshihiro Yamashita, Kiyoshi Nishikawa, Toru Yamaguchi, Takao Nishitani. apsipa 2018: 285-290 [doi]

2016

Consideration on performance improvement of shadow and reflection removal based on GMMKiyoshi Nishikawa, Yoshihiro Yamashita, Toru Yamaguchi, Takao Nishitani. apsipa 2016: 1-7 [doi]

2015

Wearable finger motion input interface system with GMM foreground segmentationEichi Tamura, Yoshihiro Yamashita, Yihsin Ho, Eri Sato-Shimokawara, Takao Nishitani, Toru Yamaguchi. taai 2015: 213-220 [doi]

2013

A Hand Gesture Recognition System Based on GMM Method for Human-Robot InterfaceYihsin Ho, Takao Nishitani, Toru Yamaguchi, Eri Sato-Shimokawara, Norio Tagawa. rvsp 2013: 291-294 [doi]

Transform Domain Shadow Removal for Foreground SilhouetteToshiaki Shiota, Kazuki Nakagami, Takao Nishitani. ieicet, 96-A(3):667-674, 2013. [doi]

2012

2011

Low complexity shadow removal on foreground segmentationKazuki Nakagami, Toshiaki Shiota, Takao Nishitani. icassp 2011: 1081-1084 [doi]

2010

Transformed domain GMM foreground segmentation for mobile video cameraYuki Hishinuma, Tomoyuki Suzuki, Kazuki Nakagami, Takao Nishitani. icip 2010: 2217-2220 [doi]

Efficient Image Enhancement Algorithm Using Multi-Rate Image ProcessingTakeshi Okuno, Takao Nishitani. ieicet, 93-A(5):958-965, 2010. [doi]

2009

Efficient multi-scale retinex algorithm using multi-rate image processingTakeshi Okuno, Takao Nishitani. icip 2009: 3145-3148 [doi]

Multiresolutional Gaussian Mixture Model for Precise and Stable Foreground Segmentation in Transform DomainHiroaki Tezuka, Takao Nishitani. ieicet, 92-A(3):772-778, 2009. [doi]

2008

A precise and stable foreground segmentation using fine-to-coarse approach in transform domainHiroaki Tezuka, Takao Nishitani. icip 2008: 2732-2735 [doi]

2006

A Stereo Echo Canceler with Input Slides and Counter-LateralizationAkihiko Sugiyama, Yann Joncour, Akihiro Hirano, Takao Nishitani, Gérard Faucon. ieicet, 89-A(6):1776-1787, 2006. [doi]

2005

Performance Evaluation of the AV CODEC on a Low-Power SPXK5SC DSP CoreTakahiro Kumura, Norio Kayama, Shinichi Shionoya, Kazuo Kumagiri, Takao Kusano, Makoto Yoshida, Masao Ikekawa, Ichiro Kuroda, Takao Nishitani. ieicet, 88-D(6):1224-1230, 2005. [doi]

2001

Multimedia Signal Processor For Mobile ApplicationsMasao Ikekawa, M. Hori, Kouhei Nadehara, Takahiro Kumura, Makoto Yoshida, Ichiro Kuroda, Takao Nishitani. icmcs 2001: [doi]

2000

Hardware/software codesign of finite field datapath for low-energy Reed-Solomon codecsLeilei Song, Keshab K. Parhi, Ichiro Kuroda, Takao Nishitani. tvlsi, 8(2):160-172, 2000. [doi]

1998

Multimedia processorsIchiro Kuroda, Takao Nishitani. pieee, 86(6):1203-1221, 1998. [doi]

Low-energy heterogeneous digit-serial Reed-Solomon codecsLeilei Song, Keshab K. Parhi, Ichiro Kuroda, Takao Nishitani. icassp 1998: 3049-3052 [doi]

1997

Guest Editors IntroductionKeshab K. Parhi, Takao Nishitani, Hironori Yamauchi. vlsisp, 16(1):5-7, 1997. [doi]

1993

DCT/IDCT processor for HDTV developed with dsp silicon compilerTakashi Miyazaki, Takao Nishitani, Masato Edahiro, Ikuko Ono, Kaoru Mitsuhashi. vlsisp, 5(2-3):151-158, 1993. [doi]

IntroductionTakao Nishitani, Peng H. Ang, Francky Catthoor. vlsisp, 5(2-3):113, 1993. [doi]

VLSI architectures for discrete wavelet transformsKeshab K. Parhi, Takao Nishitani. tvlsi, 1(2):191-202, 1993. [doi]

Folded VLSI Architectures for Discrete Wavelet TransformsKeshab K. Parhi, Takao Nishitani. iscas 1993: 1734-1737

1992

A 128 kb/s Hi-Fi Audio CODEC Based on Adaptive Transform Coding with Adaptive Block Size MDCTMasahiro Iwadare, Akihiko Sugiyama, Fumie Hazu, Akihiro Hirano, Takao Nishitani. jsac, 10(1):138-144, 1992.

Asynchronous multirate system design for programmable DSPsIchiro Kuroda, Takao Nishitani. icassp 1992: 549-552 [doi]

A reconfigurable processor array with routing LSIs and general purpose DSPsJacob Levison, Ichiro Kuroda, Takao Nishitani. asap 1992: 102-116 [doi]

A multimedia system based on MPEG video coding algorithmYoshihiro Miyamoto, Mutsumi Ohta, Mitsuharu Yano, Takao Nishitani. ccr, 22(3):18-19, 1992. [doi]

Chrominance/luminance signal separation and syntheses chips developed with a DSP silicon compilerTakashi Miyazaki, Takao Nishitani, Masaki Ishikawa, Masato Edahiro, Kaoru Mitsuhashi. tcsv, 2(2):245-254, 1992. [doi]

An encoder/decoder chip set for the MPEG video standardIchiro Tamitani, Mutsumi Ohta, Yasushi Ooi, Akio Yoshida, Mamoru Nomura, Hitoshi Koyama, Takao Nishitani. icassp 1992: 661-664 [doi]

1991

A real-time HDTV signal processor: HD-VSPIchiro Tamitani, Hidenobu Harasaki, Takao Nishitani. tcsv, 1(1):35-41, 1991. [doi]

A single-board video codec using video image signal processorsMitsuharu Yano, Jun-ichi Ohki, Takashi Mochizuki, Takao Nishitani. jvcir, 2(4):373-380, 1991. [doi]

1990

1989

A single chip VLSI chrominance/luminance separator based on a silicon compilerTakashi Miyazaki, Takao Nishitani, Shinichi Aikoh, Masaki Ishikawa, Takeshi Yoshimura, Kaoru Mitsuhashi, M. Furuichi. icassp 1989: 2433-2436 [doi]

Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISPTakao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Yukio Endo, Toshiyuki Kanou, Koichi Kikuchi. vlsisp, 1(1):25-34, 1989. [doi]

1988

A single-board video signal processor module employing newly developed LSI devicesHidenobu Harasaki, Ichiro Tamitani, Yukio Endo, Takao Nishitani, Masakatsu Yamashina, Tadayoshi Enomoto, Norio Suzuki. jsac, 6(3):513-519, 1988. [doi]

64 kbit/s audio signal transmission approaches using 32 kbit/s ADPCM channel banksMasahiro Iwadare, Takao Nishitani. jsac, 6(2):307-313, 1988. [doi]

1987

1986

1985

A CCITT standard 32 kbps ADPCM LSI codecTakao Nishitani, Ichiro Kuroda, Masao Satoh, Tadaharu Katoh, Reiichi Fukuda, Yasushi Aoki. icassp 1985: 1425-1428 [doi]

1982

A 32 kb/s toll quality ADPCM codec using a single chip signal processorTakao Nishitani, Shinichi Aikoh, Takashi Araseki, Kazunori Ozawa, Rikio Maruta. icassp 1982: 960-963 [doi]

1981

Design and Performance of a DSI Terminal for Domestic ApplicationsRikio Maruta, Atsushi Tomozawa, Takao Nishitani, Tomonori Okada, Ken'Ichi Nakano, Takashi Araseki, Mutsunari Tajima. tcom, 29(3):337-345, 1981. [doi]

1980

LSI signal processor development for communications equipmentTakao Nishitani, Yuichi Kawakami, Rikio Maruta, Akira Sawai. icassp 1980: 386-389 [doi]

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