Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation

Bradley L. Noble, J. Cris Wade, Roger D. Chamberlain. Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation. In Proceedings 34th Annual Simulation Symposium (SS 2001), Seattle, WA, USA, 22-26 April 2001. pages 56-64, IEEE Computer Society, 2001. [doi]

Authors

Bradley L. Noble

This author has not been identified. Look up 'Bradley L. Noble' in Google

J. Cris Wade

This author has not been identified. Look up 'J. Cris Wade' in Google

Roger D. Chamberlain

This author has not been identified. Look up 'Roger D. Chamberlain' in Google