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2MOS D-flip-flop in 65-nm CMOS

Ryosuke Noguchi, Kosuke Furuichi, Hiromu Uemura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Hiroaki Katsurai, Shinsuke Nakano, Hideyuki Nosaka. 2MOS D-flip-flop in 65-nm CMOS. In 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Hsinchu, Taiwan, April 16-19, 2018. pages 1-4, IEEE, 2018. [doi]

Authors

Ryosuke Noguchi

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Kosuke Furuichi

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Hiromu Uemura

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Toshiyuki Inoue

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Akira Tsuchiya

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Keiji Kishine

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Hiroaki Katsurai

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Shinsuke Nakano

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Hideyuki Nosaka

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