Abstract is missing.
- CMOS single-photon detectors for vehicle LiDAR - status and trendsSheng-Di Lin. 1 [doi]
- 5G mmWave communication: From system concept to implementationChih-Yuan Lin. 1 [doi]
- Acceleration of neural network model execution on embedded systemsChang-Jiun Chen, Kai-Chun Chen, May-chen Martin-Kuo. 1-3 [doi]
- A cuffless wearable system for real-time cutaneous pressure monitoring with cloud computing assistanceKun-Ying Yeh, Ting-Hao Lin, Yi-Yen Hsieh, Chia-Ming Chang, Yao-Joe Yang, Shey-Shi Lu. 1-4 [doi]
- TSV-aware 3D test wrapper chain optimizationYu-Yi Wu, Shih-Hsu Huang. 1-4 [doi]
- Optimization of threshold logic networks with ODC-based node mergingFu-Lian Wong, Li-Cheng Zheng, Yung-Chih Chen. 1-4 [doi]
- V2V & V2I for connected vehicleDarren Chen. 1 [doi]
- Deep fusion of heterogeneous sensor modalities for the advancements of ADAS to autonomous vehiclesPei-Jung Liang, Peter Chondro, Jheng-Rong Wu, Wei-Hao Lai, Yi-Fa Sun, Yi-Chen Lai, Tse Min Chen. 1-4 [doi]
- Machine learning opportunities and applications in SoC designBauli Yan. 1 [doi]
- Double asymmetric-latency storage class memories (SCMs) for fast-write SCM, fast-read SCM & NAND flash hybrid SSDsYutaka Adachi, Chihiro Matsui, Ken Takeuchi. 1-4 [doi]
- Systematic co-optimization from chip design, process technology to systems for GPU AI chipJohn R. Hu, James Chen, Boon-khim Liew, Yanfeng Wang, Lianxi Shen, Lin Cong. 1-2 [doi]
- Efficient method for AI computingSimon See. 1 [doi]
- Hardware design of disparity computation for stereo vision using guided image filteringShen-Fu Hsiao, Chih-Hsuan Chang. 1-4 [doi]
- A high learning capability probabilistic spiking neural network chipHung-Yi Hsieh, Pin-Yi Li, Cheng-Han Yang, Kea-Tiong Tang. 1-4 [doi]
- 2MOS D-flip-flop in 65-nm CMOSRyosuke Noguchi, Kosuke Furuichi, Hiromu Uemura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Hiroaki Katsurai, Shinsuke Nakano, Hideyuki Nosaka. 1-4 [doi]
- A foundry's view of hardware securityShih-Lien Lu. 1 [doi]
- MapReduce-based pattern classification for design space analysisYan-Shiun Wu, Hong-Yan Su, Yi-Hsiang Chang, Rasit Onur Topaloglu, Yih-Lang Li. 1-4 [doi]
- Machine learning for IC design and technology co-optimization in extreme scalingDavid Z. Pan. 1 [doi]
- A fast ECG diagnosis by using spectral artificial neural network (SANN) approachKun-Chih Jimmy Chen, Po-Chen Chien. 1-4 [doi]
- Emerging technologies and concepts for 5G applications - A. making additive manufactured ceramic microwave filters ready for 5GSebastian Wolfgang Sattler, Fabrizio Gentili, Reinhard Teschl, Carlos Carceller, Wolfgang Bösch. 1-6 [doi]
- High-throughput Von Neumann post-processing for random number generatorRuilin Zhang, Sijia Chen, Chao Wan, Hirofumi Shinohara. 1-4 [doi]
- Using approximate circuits to counter process imperfections in CNFET based circuitsKaship Sheikh, Lan Wei. 1-4 [doi]
- Side-channel-aware LSI designNaofumi Homma. 1 [doi]
- Unified technology optimization platform using integrated analysis (UTOPIA) for holistic pathfinding DTCO of advanced transistorsStanley Seungchul Song. 1 [doi]
- A 11-bit 35-MS/s wide input range SAR ADC in 180-nm CMOS processWen-Chia Luo, Soon-Jyh Chang, Chun-Po Huang, Hao-Sheng Wu. 1-4 [doi]
- Antenna-in-package design and module integration for millimeter-wave communication and 5GXiaoxiong Gu, Bodhisatwa Sadhu, Duixian Liu, Christian W. Baks, Alberto Valdes-Garcia. 1-2 [doi]
- Diagnosis and repair of cells (DRC) responsible for power-supply-noise violationsYu-Ching Li, Shih-Yao Lin 0001, Heng-Yi Lin, James Chien-Mo Li. 1-4 [doi]
- A glance of the CASLab HSAIL SIMT GPU for OpenCL and TensorFlow applicationsChung-Ho Chen. 1 [doi]
- A high-performance current-mode DC-DC buck converter with adaptive clock control techniqueYou-Te Chiu, Yu-Hsuan Liu, Chung-Chih Hung. 1-4 [doi]
- Fuzz testing & software composition analysis in software engineeringEugene Yang. 1-3 [doi]
- An Ising model mapping to solve rectangle packing problemKotaro Terada, Daisuke Oku, Sho Kanamaru, Shu Tanaka, Masato Hayashi, Masanao Yamaoka, Masao Yanagisawa, Nozomu Togawa. 1-4 [doi]
- Techology trend of edge AIYen-Lin Lee, Pei-Kuei Tsung, Max Wu. 1-2 [doi]
- Phased array technique for mm-wave wireless communicationChien-Nan Kuo. 1 [doi]
- Homo technologicusJan M. Rabaey. 1 [doi]
- A digital peak current delay compensation for primary-side regulation flyback adapterChun-Ping Niou, Chien-Hung Tsai, Ta-Jin Chen. 1-4 [doi]
- Moore's law - predict the unpredictableChia-Hong Jan. 1 [doi]
- Hold violation analysis for functional test of ultra-low temperature circuits at room temperatureTakahiro Nakayama, Masanori Hashimoto. 1-4 [doi]
- MORAS: An energy-scalable system using adaptive voltage scalingKuo-Chiang Chang, Shien-Chun Luo, Ching-Ji Huang, Jia-Hung Peng, Yuan-Hua Chu. 1-4 [doi]
- Silicon photonics : From research to industrial realityFrédéric Boeuf. 1 [doi]
- A 1.86mJ/Gb/query bit-plane payload machine learning processor in 90nm CMOSFang-Ju Ku, Tung-Yu Wu, Yen-Chin Liao, Hsie-Chia Chang, Wing Hung Wong, Chen-Yi Lee. 1-4 [doi]
- Parallel order ATPG for test compactionYu-Wei Chen, Yu-Hao Ho, Chih-Ming Chang, Kai-Chieh Yang, Ming-Ting Li, James Chien-Mo Li. 1-4 [doi]
- On IC traceability via blockchainMd. Nazmul Islam, Vinay C. Patil, Sandip Kundu. 1-4 [doi]
- Self-driving cars: Technologies, business opportunities and challengesChieh-Chih Bob Wang. 1 [doi]
- The application of non-volatile look-up-table operations based on multilevel-cell of resistance switching random access memoryFeng Zhang 0014, Dongyu Fan, Qi-Peng Lin, Qiang Huo, Yun Li, Lan Dai, Cheng-Ying Chen, Haihua Shen. 1-4 [doi]
- A ΔΣ DPLL with 1b TDC, 4b DTC and 8-tap FIR filter for low-voltage clock generation/modulation systemsXiaohua Huang, Han Liu, Woogeun Rhee, Zhihua Wang. 1-4 [doi]
- Circuit design in nano-scale CMOS technologiesKevin Zhang. 1 [doi]
- Massive MIMO detection VLSI designChia-Hsiang Yang. 1 [doi]
- Analysis of thermal effects in integrated radio transmittersChristian Fager, Mattias Thorsell, Emanuel Baptista, Koen Buisman, Johan Bremer, Johan Bergsten, Niklas Rorsman. 1-2 [doi]
- Beyond structural test, the rising need for system-level testHarry H. Chen. 1-4 [doi]
- A capacitive cross-coupled GaN HEMT injection-locked frequency dividerSheng-Lyang Jang, Ke Jen Lin, Wen Cheng Lai, Miin-Horng Juang. 1-3 [doi]
- Machine learning further improving place and route QoRWeibin Ding. 1 [doi]
- 28nm near/sub-threshold dual-port FIFO memory for shared queues in multi-sensor applicationsYi-Chun Wu, Po-Tsang Huang, Shang-Lin Wu, Sheng-Chi Lung, Wei-Chang Wang, Wei Hwang, Ching-Te Chuang. 1-4 [doi]
- SOLAR: Simultaneous optimization of control-layer pins placement and channel routing in flow-based microfluidic biochipsJia-Lin Wu, Katherine Shu-Min Li, Jain-De Li, Sying-Jyan Wang, Tsung-Yi Ho. 1-4 [doi]
- Abundant-data computing: The N3XT 1, 000XSubhasish Mitra. 1 [doi]
- A learning-based methodology for routability prediction in placementLi-Chin Chen, Chien-Chia Huang, Yao-Lin Chang, Hung-Ming Chen. 1-4 [doi]
- Design of divider circuit for electrochemical impedance spectroscopy measurement systemSiang-Wei Wang, Tse-An Chen, Kuan-Hung Chen, Chia-Ling Wei. 1-4 [doi]
- Adaptive test method on production system-level testing (SLT) to optimize test cost, resources and defect parts per million (DPPM)Subagaran Letchumanan, Terrence Huat Hin Tan, Yee Pheng Gan, Sai Leong Wong. 1-3 [doi]
- Triple patterning lithography-aware detailed routing ensuring via layer decomposabilityHua-Yi Wu, Shao-Yun Fang. 1-4 [doi]
- Co-designed systems for deep learning hardware acceleratorsDavid M. Brooks. 1 [doi]
- GaN-based digital transmitter architectures for 5GFlorian Huhn, Andreas Wentzel, Wolfgang Heinrich. 1-2 [doi]
- DrowsyNet: Convolutional neural networks with runtime power-accuracy tunability using inference-stage dropoutRen-Shuo Liu, Yun-Chen Lo, Yuan-Chun Luo, Chih-Yu Shen, Cheng-Ju Lee. 1-4 [doi]
- High-performance NTT architecture for large integer multiplicationJheng-Hao Ye, Ming-Der Shieh. 1-4 [doi]
- Using range-equivalent circuits for facilitating bounded sequential equivalence checkingYung-Chih Chen, Wei-An Ji, Chih-Chung Wang, Ching-Yi Huang, Chia-Cheng Wu, Chia-Chun Lin, Chun-Yao Wang. 1-4 [doi]
- Accurate and fast obstacle detection method for automotive applications based on stereo visionYi-Chin Tsai, Kuan-Hung Chen, Yun Chen, Jih-Hsiang Cheng. 1-4 [doi]
- Mobile/embedded DNN and AI SoCsHoi-Jun Yoo. 1 [doi]
- End-to-end hardware accelerator for deep convolutional neural networkTian-Sheuan Chang. 1 [doi]
- A 473 μW wireless 16-channel neural recording SoC with RF energy harvesterKun-Ying Yeh, Yu-Jie Huang, Tung-Chien Chen, Liang-Gee Chen, Shey-Shi Lu. 1-4 [doi]
- Digital intelligence and chip designSashi Obilisetty. 1-4 [doi]
- A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systemsFangyu Mao, Yan Lu 0002, Seng-Pan U, Rui P. Martins. 1-4 [doi]
- Safe and secure SOC architecture for autonomous drivingLei Gao. 1 [doi]