Testability improvement for 12.8 GB/s Wide IO DRAM controller by small area pre-bonding TSV tests and a 1 GHz sampled fully digital noise monitor

Takao Nomura, Ryo Mori, Munehiro Ito, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Kazuo Otsuga, Koji Nii, Sadayuki Morita, Tomoaki Hashimoto, Tsuyoshi Kida, Junichi Yamada, Hideki Tanaka. Testability improvement for 12.8 GB/s Wide IO DRAM controller by small area pre-bonding TSV tests and a 1 GHz sampled fully digital noise monitor. In Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, San Jose, CA, USA, September 22-25, 2013. pages 1-4, IEEE, 2013. [doi]

@inproceedings{NomuraMITOFONMHKYT13,
  title = {Testability improvement for 12.8 GB/s Wide IO DRAM controller by small area pre-bonding TSV tests and a 1 GHz sampled fully digital noise monitor},
  author = {Takao Nomura and Ryo Mori and Munehiro Ito and Koji Takayanagi and Toshihiko Ochiai and Kazuki Fukuoka and Kazuo Otsuga and Koji Nii and Sadayuki Morita and Tomoaki Hashimoto and Tsuyoshi Kida and Junichi Yamada and Hideki Tanaka},
  year = {2013},
  doi = {10.1109/CICC.2013.6658415},
  url = {http://dx.doi.org/10.1109/CICC.2013.6658415},
  researchr = {https://researchr.org/publication/NomuraMITOFONMHKYT13},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, San Jose, CA, USA, September 22-25, 2013},
  publisher = {IEEE},
}