Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM - researchr publication authors

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Takao Nomura, Ryo Mori, Koji Takayanagi, Kazuki Fukuoka, Koji Nii. Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM. IEEE J. Emerg. Sel. Topics Circuits Syst., 6(3):364-372, 2016. [doi]

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