Takao Nomura, Ryo Mori, Koji Takayanagi, Kazuki Fukuoka, Koji Nii. Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM. IEEE J. Emerg. Sel. Topics Circuits Syst., 6(3):364-372, 2016. [doi]
@article{NomuraMTFN16,
title = {Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM},
author = {Takao Nomura and Ryo Mori and Koji Takayanagi and Kazuki Fukuoka and Koji Nii},
year = {2016},
doi = {10.1109/JETCAS.2016.2547719},
url = {http://dx.doi.org/10.1109/JETCAS.2016.2547719},
researchr = {https://researchr.org/publication/NomuraMTFN16},
cites = {0},
citedby = {0},
journal = {IEEE J. Emerg. Sel. Topics Circuits Syst.},
volume = {6},
number = {3},
pages = {364-372},
}