3D-Sorter: 3D Design of a Resource-Aware Hardware Sorter for Edge Computing Platforms Under Area and Energy Consumption Constraints

Amin Norollah, Zahra Kazemi, David Hély. 3D-Sorter: 3D Design of a Resource-Aware Hardware Sorter for Edge Computing Platforms Under Area and Energy Consumption Constraints. In 2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020. pages 42-47, IEEE, 2020. [doi]

@inproceedings{NorollahKH20,
  title = {3D-Sorter: 3D Design of a Resource-Aware Hardware Sorter for Edge Computing Platforms Under Area and Energy Consumption Constraints},
  author = {Amin Norollah and Zahra Kazemi and David Hély},
  year = {2020},
  doi = {10.1109/ISVLSI49217.2020.00018},
  url = {https://doi.org/10.1109/ISVLSI49217.2020.00018},
  researchr = {https://researchr.org/publication/NorollahKH20},
  cites = {0},
  citedby = {0},
  pages = {42-47},
  booktitle = {2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-5775-7},
}