A Methodology for Testing High-Performance Circuits at Arbitrarily Low Test Frequency

Muhammad Nummer, Manoj Sachdev. A Methodology for Testing High-Performance Circuits at Arbitrarily Low Test Frequency. In 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA. pages 68-74, IEEE Computer Society, 2001. [doi]

@inproceedings{NummerS01,
  title = {A Methodology for Testing High-Performance Circuits at Arbitrarily Low Test Frequency},
  author = {Muhammad Nummer and Manoj Sachdev},
  year = {2001},
  url = {http://csdl.computer.org/comp/proceedings/vts/2001/1122/00/11220068abs.htm},
  tags = {testing},
  researchr = {https://researchr.org/publication/NummerS01},
  cites = {0},
  citedby = {0},
  pages = {68-74},
  booktitle = {19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1122-8},
}