Integrating formal verification and high-level processor pipeline synthesis - researchr publication authors

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Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu. Integrating formal verification and high-level processor pipeline synthesis. In IEEE 9th Symposium on Application Specific Processors, SASP 2011, San Diego, CA, USA, June 5-6, 2011. pages 22-29, IEEE Computer Society, 2011. [doi]

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