Optimisation and Parallelism in Synchronous Digital Circuit Simulators

John T. O'Donnell, Cordelia V. Hall. Optimisation and Parallelism in Synchronous Digital Circuit Simulators. In IEEE 15th International Conference on Computational Science and Engineering, CSE 2012, Paphos, Cyprus, December 5-7, 2012. pages 94-101, IEEE Computer Society, 2012. [doi]

Abstract

Abstract is missing.