NAND flash architectures reducing write amplification through multi-write codes

Saher Odeh, Yuval Cassuto. NAND flash architectures reducing write amplification through multi-write codes. In IEEE 30th Symposium on Mass Storage Systems and Technologies, MSST 2014, Santa Clara, CA, USA, June 2-6, 2014. pages 1-10, IEEE, 2014. [doi]

Abstract

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