Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus

Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Katsuya Kikuchi, Masahiro Aoyagi. Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus. In 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2017, Seoul, South Korea, September 18-20, 2017. pages 128-135, IEEE, 2017. [doi]

Abstract

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