A high-speed and low-voltage associative co-processor with Hamming distance ordering using word-parallel and hierarchical search architecture

Yusuke Oike, Makoto Ikeda, Kunihiro Asada. A high-speed and low-voltage associative co-processor with Hamming distance ordering using word-parallel and hierarchical search architecture. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 643-646, IEEE, 2003. [doi]

Authors

Yusuke Oike

This author has not been identified. Look up 'Yusuke Oike' in Google

Makoto Ikeda

This author has not been identified. Look up 'Makoto Ikeda' in Google

Kunihiro Asada

This author has not been identified. Look up 'Kunihiro Asada' in Google