Hidetoshi Onodera. Dependable VLSI Program in Japan: Program Overview and the Current Status of Dependable VLSI Platform Project. In Proceedings of the 20th IEEE Asian Test Symposium, ATS 2011, New Delhi, India, November 20-23, 2011. pages 492-495, IEEE Computer Society, 2011. [doi]
@inproceedings{Onodera11,
title = {Dependable VLSI Program in Japan: Program Overview and the Current Status of Dependable VLSI Platform Project},
author = {Hidetoshi Onodera},
year = {2011},
doi = {10.1109/ATS.2011.56},
url = {http://doi.ieeecomputersociety.org/10.1109/ATS.2011.56},
researchr = {https://researchr.org/publication/Onodera11},
cites = {0},
citedby = {0},
pages = {492-495},
booktitle = {Proceedings of the 20th IEEE Asian Test Symposium, ATS 2011, New Delhi, India, November 20-23, 2011},
publisher = {IEEE Computer Society},
isbn = {978-1-4577-1984-4},
}