Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array

Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle. Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array. In 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings. pages 184, IEEE Computer Society, 2003. [doi]

@inproceedings{OrsBPV03,
  title = {Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array},
  author = {Siddika Berna Örs and Lejla Batina and Bart Preneel and Joos Vandewalle},
  year = {2003},
  url = {http://csdl.computer.org/comp/proceedings/ipdps/2003/1926/00/19260184babs.htm},
  researchr = {https://researchr.org/publication/OrsBPV03},
  cites = {0},
  citedby = {0},
  pages = {184},
  booktitle = {17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1926-1},
}