Susana Ortega-Cisneros, Juan José Raygoza-Panduro, José Roberto Reyes Barón, Daniel Tonali Aranda Bretón, Antonio Casillas. Characterization technique to implement self-timed cells for VLSI design blocks. In 11th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2014, Campeche, Mexico, September 29 - October 3, 2014. pages 1-6, IEEE, 2014. [doi]
Abstract is missing.