Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li, Hidehiro Fujiwara, Hung-Jen Liao, Tsung-Yung Jonathan Chang. 3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications. In 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023. pages 1-2, IEEE, 2023. [doi]
@inproceedings{OsadaNNLWLFLC23,
title = {3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications},
author = {Yoshiaki Osada and Takaaki Nakazato and Koji Nii and Jhon-Jhy Liaw and Shien-Yang Michael Wu and Quincy Li and Hidehiro Fujiwara and Hung-Jen Liao and Tsung-Yung Jonathan Chang},
year = {2023},
doi = {10.23919/VLSITechnologyandCir57934.2023.10185289},
url = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185289},
researchr = {https://researchr.org/publication/OsadaNNLWLFLC23},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023},
publisher = {IEEE},
isbn = {978-4-86348-806-9},
}