Keigo Oshiro, Daisuke Kanemoto, Haruichi Kanaya, Ramesh K. Pokharel, Keiji Yoshida. A small die area and high linearity 10-bit capacitive three-level DAC. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, December 2-5, 2012. pages 164-167, IEEE, 2012. [doi]
@inproceedings{OshiroKKPY12,
title = {A small die area and high linearity 10-bit capacitive three-level DAC},
author = {Keigo Oshiro and Daisuke Kanemoto and Haruichi Kanaya and Ramesh K. Pokharel and Keiji Yoshida},
year = {2012},
doi = {10.1109/APCCAS.2012.6418997},
url = {http://dx.doi.org/10.1109/APCCAS.2012.6418997},
researchr = {https://researchr.org/publication/OshiroKKPY12},
cites = {0},
citedby = {0},
pages = {164-167},
booktitle = {2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, December 2-5, 2012},
publisher = {IEEE},
}