A simplified executable model to evaluate latency and throughput of networks-on-chip

Luciano Ost, Fernando Gehm Moraes, Leandro Möller, Leandro Soares Indrusiak, Manfred Glesner, Sanna Määttä, Jari Nurmi. A simplified executable model to evaluate latency and throughput of networks-on-chip. In Marcelo Lubaszewski, Michel Renovell, Rajesh K. Gupta, editors, Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008. pages 170-175, ACM, 2008. [doi]

@inproceedings{OstMMIGMN08,
  title = {A simplified executable model to evaluate latency and throughput of networks-on-chip},
  author = {Luciano Ost and Fernando Gehm Moraes and Leandro Möller and Leandro Soares Indrusiak and Manfred Glesner and Sanna Määttä and Jari Nurmi},
  year = {2008},
  doi = {10.1145/1404371.1404420},
  url = {http://doi.acm.org/10.1145/1404371.1404420},
  researchr = {https://researchr.org/publication/OstMMIGMN08},
  cites = {0},
  citedby = {0},
  pages = {170-175},
  booktitle = {Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008},
  editor = {Marcelo Lubaszewski and Michel Renovell and Rajesh K. Gupta},
  publisher = {ACM},
  isbn = {978-1-60558-231-3},
}