Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs - researchr publication authors

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Jingzhao Ou, Viktor K. Prasanna. Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs. In Toomas P. Plaks, editor, Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 2005, Las Vegas, Nevada, USA, June 27-30, 2005. pages 55-61, CSREA Press, 2005.

This author has not been identified. Look up 'Jingzhao Ou' in GoogleThis author has not been identified. Look up 'Viktor K. Prasanna' in Google

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