A High Performance Full-Word Barrett Multiplier Designed for FPGAs with DSP Resources

Erdem Ozcan, Serdar Süer Erdem. A High Performance Full-Word Barrett Multiplier Designed for FPGAs with DSP Resources. In 15th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2019, Lausanne, Switzerland, July 15-18, 2019. pages 73-76, IEEE, 2019. [doi]

Abstract

Abstract is missing.