Implementation of a Novel Fault Tolerant Routing Technique for Mesh Network on Chip

Akshay B. P., Ganesh K. M., Thippeswamy D. R., Vishnu S. Bhat, Anitha Vijayakumar, Ananda Y. R., John Jose. Implementation of a Novel Fault Tolerant Routing Technique for Mesh Network on Chip. In S. Rajaram, N. B. Balamurugan, D. Gracia Nirmala Rani, Virendra Singh, editors, VLSI Design and Test - 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers. Volume 892 of Communications in Computer and Information Science, pages 495-506, Springer, 2018. [doi]

Authors

Akshay B. P.

This author has not been identified. Look up 'Akshay B. P.' in Google

Ganesh K. M.

This author has not been identified. Look up 'Ganesh K. M.' in Google

Thippeswamy D. R.

This author has not been identified. Look up 'Thippeswamy D. R.' in Google

Vishnu S. Bhat

This author has not been identified. Look up 'Vishnu S. Bhat' in Google

Anitha Vijayakumar

This author has not been identified. Look up 'Anitha Vijayakumar' in Google

Ananda Y. R.

This author has not been identified. Look up 'Ananda Y. R.' in Google

John Jose

This author has not been identified. Look up 'John Jose' in Google