Pavithara P, Raghapriya N. R, P. M. Dinesh, S. Gowtham, D. Viji, K. Kavin Kumar, Gokul Chandrasekaran. FPGA Implementation of XOR-MUX based Full Adder and Truncated Multiplier for Signal Processing Applications. In 15th International Conference on Computing Communication and Networking Technologies, ICCCNT 2024, Kamand, India, June 24-28, 2024. pages 1-5, IEEE, 2024. [doi]
Abstract is missing.