Heuristics for the Placement of Flip-Flops in Partial Scan Designs and the Placement of Signal Boosters in Lossy Circuits

Doowon Paik, Sudhakar M. Reddy, Sartaj Sahni. Heuristics for the Placement of Flip-Flops in Partial Scan Designs and the Placement of Signal Boosters in Lossy Circuits. In VLSI Design. pages 45-50, 1993.

Authors

Doowon Paik

This author has not been identified. Look up 'Doowon Paik' in Google

Sudhakar M. Reddy

This author has not been identified. Look up 'Sudhakar M. Reddy' in Google

Sartaj Sahni

This author has not been identified. Look up 'Sartaj Sahni' in Google