Synthesis & Testing for Low Power - researchr publication

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Ajit Pal, Santanu Chattopadhyay. Synthesis & Testing for Low Power. In VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009. pages 37-38, IEEE, 2009. [doi]

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