Chandrajit Pal, Pabitra Das, Sudhindu Bikash Mandal, Amlan Chakrabarti, Samik Basu, Ranjan Ghosh. An efficient hardware design of SIFT algorithm using fault tolerant reversible logic. In 2nd IEEE International Conference on Recent Trends in Information Systems, ReTIS 2015, Kolkata, India, July 9-11, 2015. pages 514-519, IEEE, 2015. [doi]
Abstract is missing.