Ashok Kumar Palaniswamy, Spyros Tragoudas. A scalable threshold logic synthesis method using ZBDDs. In Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang 0002, editors, Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. pages 307-310, ACM, 2012. [doi]
@inproceedings{PalaniswamyT12,
title = {A scalable threshold logic synthesis method using ZBDDs},
author = {Ashok Kumar Palaniswamy and Spyros Tragoudas},
year = {2012},
doi = {10.1145/2206781.2206856},
url = {http://doi.acm.org/10.1145/2206781.2206856},
researchr = {https://researchr.org/publication/PalaniswamyT12},
cites = {0},
citedby = {0},
pages = {307-310},
booktitle = {Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012},
editor = {Erik Brunvard and Ken Stevens and Joseph R. Cavallaro and Tong Zhang 0002},
publisher = {ACM},
isbn = {978-1-4503-1244-8},
}