Ayan Palchaudhuri, Anindya Sundar Dhar. Primitive Instantiation for Speed-Area Efficient Architecture Design of Cellular Automata based Mageto Logic on FPGA with Built-In Testability. In 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2020, Fayetteville, AR, USA, May 3-6, 2020. pages 207, IEEE, 2020. [doi]
@inproceedings{PalchaudhuriD20,
title = {Primitive Instantiation for Speed-Area Efficient Architecture Design of Cellular Automata based Mageto Logic on FPGA with Built-In Testability},
author = {Ayan Palchaudhuri and Anindya Sundar Dhar},
year = {2020},
doi = {10.1109/FCCM48280.2020.00038},
url = {https://doi.org/10.1109/FCCM48280.2020.00038},
researchr = {https://researchr.org/publication/PalchaudhuriD20},
cites = {0},
citedby = {0},
pages = {207},
booktitle = {28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2020, Fayetteville, AR, USA, May 3-6, 2020},
publisher = {IEEE},
isbn = {978-1-7281-5803-7},
}