Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis

Sujan Pandey, Tudor Murgan, Manfred Glesner. Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 296-301, IEEE, 2006. [doi]

@inproceedings{PandeyMG06,
  title = {Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis},
  author = {Sujan Pandey and Tudor Murgan and Manfred Glesner},
  year = {2006},
  doi = {10.1109/VLSISOC.2006.313250},
  url = {http://dx.doi.org/10.1109/VLSISOC.2006.313250},
  researchr = {https://researchr.org/publication/PandeyMG06},
  cites = {0},
  citedby = {0},
  pages = {296-301},
  booktitle = {IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006},
  publisher = {IEEE},
}