A Semantic Model of VHDL for Validating Rewriting Algebras

Sheetanshu L. Pandey, Kothanda R. Subramanian, Philip A. Wilsey. A Semantic Model of VHDL for Validating Rewriting Algebras. In 22rd EUROMICRO Conference 96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic. pages 167-176, IEEE Computer Society, 1996. [doi]

@inproceedings{PandeySW96,
  title = {A Semantic Model of VHDL for Validating Rewriting Algebras},
  author = {Sheetanshu L. Pandey and Kothanda R. Subramanian and Philip A. Wilsey},
  year = {1996},
  url = {http://csdl.computer.org/comp/proceedings/euromicro/1996/7487/00/74870167abs.htm},
  tags = {graph-rewriting,  algebra, rewriting},
  researchr = {https://researchr.org/publication/PandeySW96},
  cites = {0},
  citedby = {0},
  pages = {167-176},
  booktitle = {22rd EUROMICRO Conference  96, Beyond 2000: Hardware and Software Design Strategies,  September 2-5, 1996, Prague, Czech Republic},
  publisher = {IEEE Computer Society},
}