A 32 Gb/s Low Power Little Area Re-timer with PI Based CDR in 65 nm CMOS Technology - researchr publication authors

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Zhengbin Pang, Fangxu Lv, Weiping Tang, Mingche Lai, Kaile Guo, Yuxuan Wu, Tao Liu, Miaomiao Wu, Dechao Lu. A 32 Gb/s Low Power Little Area Re-timer with PI Based CDR in 65 nm CMOS Technology. In Dezun Dong, Xiaoli Gong, Cunlu Li, Dongsheng Li, Junjie Wu, editors, Advanced Computer Architecture - 13th Conference, ACA 2020, Kunming, China, August 13-15, 2020, Proceedings. Volume 1256 of Communications in Computer and Information Science, pages 31-42, Springer, 2020. [doi]

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