A low latency kernel recursive least squares processor using FPGA technology - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Yeyong Pang, Shaojun Wang, Yu Peng, Nicholas J. Fraser, Philip H. W. Leong. A low latency kernel recursive least squares processor using FPGA technology. In 2013 International Conference on Field-Programmable Technology, FPT 2013, Kyoto, Japan, December 9-11, 2013. pages 144-151, IEEE, 2013. [doi]

This author has not been identified. Look up 'Yeyong Pang' in GoogleThis author has not been identified. Look up 'Shaojun Wang' in GoogleThis author has not been identified. Look up 'Yu Peng' in GoogleThis author has not been identified. Look up 'Nicholas J. Fraser' in GoogleThis author has not been identified. Look up 'Philip H. W. Leong' in Google

runs on WebDSL