An Efficient Design Technique for High Performance Dynamic Feedthrough Logic with Enhanced Noise Tolerance

Shashank Parashar, Chaudhry Indra Kumar, Manisha Pattanaik. An Efficient Design Technique for High Performance Dynamic Feedthrough Logic with Enhanced Noise Tolerance. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 49-53, IEEE Computer Society, 2011. [doi]

@inproceedings{ParasharKP11,
  title = {An Efficient Design Technique for High Performance Dynamic Feedthrough Logic with Enhanced Noise Tolerance},
  author = {Shashank Parashar and Chaudhry Indra Kumar and Manisha Pattanaik},
  year = {2011},
  doi = {10.1109/ISVLSI.2011.31},
  url = {http://dx.doi.org/10.1109/ISVLSI.2011.31},
  tags = {logic, design},
  researchr = {https://researchr.org/publication/ParasharKP11},
  cites = {0},
  citedby = {0},
  pages = {49-53},
  booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India},
  publisher = {IEEE Computer Society},
}