Ki Tae Park, Doo-Gon Kim, Soonwook Hwang, Myounggon Kang, Hoosung Cho, Youngwook Jeong, Yong-ll Seo, Jae-Hoon Jang, Hansoo Kim, Soon-Moon Jung, Yeong-Taek Lee, Changhyun Kim, Won-Seong Lee. A 45nm 4Gb 3-Dimensional Double-Stacked Multi-Level NAND Flash Memory with Shared Bitline Structure. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 510-511, IEEE, 2008. [doi]
@inproceedings{ParkKHKCJSJKJLKL08,
title = {A 45nm 4Gb 3-Dimensional Double-Stacked Multi-Level NAND Flash Memory with Shared Bitline Structure},
author = {Ki Tae Park and Doo-Gon Kim and Soonwook Hwang and Myounggon Kang and Hoosung Cho and Youngwook Jeong and Yong-ll Seo and Jae-Hoon Jang and Hansoo Kim and Soon-Moon Jung and Yeong-Taek Lee and Changhyun Kim and Won-Seong Lee},
year = {2008},
doi = {10.1109/ISSCC.2008.4523281},
url = {http://dx.doi.org/10.1109/ISSCC.2008.4523281},
researchr = {https://researchr.org/publication/ParkKHKCJSJKJLKL08},
cites = {0},
citedby = {0},
pages = {510-511},
booktitle = {2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008},
publisher = {IEEE},
isbn = {978-1-4244-2010-0},
}