High performance two-stage charge-pump for spur reduction in CMOS PLL

Jung-Woong Park, Nam Soo Kim, Hye-Im Jeong, Da-Sol Won, Ho-Yong Choi. High performance two-stage charge-pump for spur reduction in CMOS PLL. In IEEE 11th International Multi-Conference on Systems, Signals & Devices, SSD 2014, Castelldefels-Barcelona, Spain, February 11-14, 2014. pages 1-7, IEEE, 2014. [doi]

Abstract

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