Young-Jun Park, Fei Yuan. 0.25-4 ns 185 MS/s 4-bit pulse-shrinking time-to-digital converter in 130 nm CMOS using a 2-step conversion scheme. In IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015, Fort Collins, CO, USA, August 2-5, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{ParkY15-7,
title = {0.25-4 ns 185 MS/s 4-bit pulse-shrinking time-to-digital converter in 130 nm CMOS using a 2-step conversion scheme},
author = {Young-Jun Park and Fei Yuan},
year = {2015},
doi = {10.1109/MWSCAS.2015.7282113},
url = {https://doi.org/10.1109/MWSCAS.2015.7282113},
researchr = {https://researchr.org/publication/ParkY15-7},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015, Fort Collins, CO, USA, August 2-5, 2015},
publisher = {IEEE},
isbn = {978-1-4673-6558-1},
}