System-level power-performance trade-offs in bus matrix communication architecture synthesis - researchr publication authors

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Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil D. Dutt. System-level power-performance trade-offs in bus matrix communication architecture synthesis. In Reinaldo A. Bergamaschi, Kiyoung Choi, editors, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006. pages 300-305, ACM, 2006. [doi]

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