G. Pastuszak. Hardware architectures for the H.265/HEVC discrete cosine transform. IET Image Processing, 9(6):468-477, 2015. [doi]
@article{Pastuszak15-0,
title = {Hardware architectures for the H.265/HEVC discrete cosine transform},
author = {G. Pastuszak},
year = {2015},
doi = {10.1049/iet-ipr.2014.0277},
url = {http://dx.doi.org/10.1049/iet-ipr.2014.0277},
researchr = {https://researchr.org/publication/Pastuszak15-0},
cites = {0},
citedby = {0},
journal = {IET Image Processing},
volume = {9},
number = {6},
pages = {468-477},
}