Designing Size-aware Cryptographic Primitives for FPGA-based Accelerators - researchr publication

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Aditya Peer, Rohan Sudhir Basugade, Siddhant, Neeraj Kumar Yadav, Agamdeep Singh, Praveen Tammana, Sumit Darak, Rinku Shah. Designing Size-aware Cryptographic Primitives for FPGA-based Accelerators. PACMNET, 4(CoNEXT1), 2026. [doi]

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